The present invention relates to a filter circuit for use in the audio frequency band.
A prior art pertaining filter circuit will now be described with reference to FIG. 5. The illustrated filter circuit is a primary LPF (low-pass filter) having a gm (mutual conductance)-C (capacitance) type filter circuit construction. Referring to the figure, a differential amplifier 1 is furnished with a supply voltage Vcc at its terminal a, and amplifies a voltage difference between an input signal IN provided to its terminal b and an output signal OUT outputted from an output terminal c of a buffer circuit 2. The buffer circuit 2 converts the output impedance at an output terminal d of the differential amplifier 1. A variable constant current circuit 3 sets constant currents I1 and I2 at terminals e and f of the differential amplifier 1. The filter circuit further comprises a capacitor C1.
The differential amplifier 1 has the following construction. A transistor Q1 which is an NPN transistor, is used as an active load. Transistors Q2 and Q3 which are also NPN transistors, are used as active loads of transistors Q4 and Q5, respectively. The transistor Q4 is an NPN transistor with its base connected to the terminal b. When its base current which is generated by the voltage of the input signal IN exceeds a threshold current, the transistor Q4 is turned on to cause its collector current corresponding to the base current.
A constant current source S1 provides a current I6, which is the difference between the emitter current I3 through the transistor Q4 and a current I4 through a resistor R1 when I3&gt;I5. When I3&lt;I5, the current I6 is the sum of the currents I3 and I4. A resistor R1 is connected between the emitters of the transistors Q4 and Q5 for gain control of the differential amplifier 1.
The transistor Q5 is an NPN transistor with its base connected to the output terminal c. When its base current generated by the voltage of the output signal OUT exceeds its threshold current, the transistor Q5 is turned on to cause its collector current corresponding to the base current. A constant current source S2 provides a current I7, which is the sum of the emitter current I5 through the transistor Q5 and the current I4 through the resistor R1 when I3&gt;I5. When I3&lt;I5, the current I7 is the difference between the currents I3 and I4.
A transistor Q6 which is an NPN transistor, provides its collector current corresponding to its base current generated by the voltage between the base of the transistor Q2 and the collector of the transistor Q4, when the base current exceeds a threshold current.
A transistor Q7 which is also an NPN transistor, provides its collector current corresponding to its base current generated by the voltage between the base of the transistor Q3 and the collector of the transistor Q5 when the base current exceeds a threshold current.
A transistor Q8 which is a PNP transistor, forms a current mirror circuit with a transistor Q9, and serves as an active load of the transistor Q7. The transistor Q9 is also a PNP transistor, and causes a base current exceeding a threshold current with the same base voltage as the transistor Q8. A change in the base current causes a change in its collector current with the same ratio as the transistor Q8.
The buffer circuit 2 has the following construction. A transistor Q10 which is an NPN transistor with its base connected to the output terminal d of the differential amplifier 1, is turned on to cause its collector current corresponding to its base current generated by the voltage of the output signal at the output terminal when the base current exceeds a threshold current. A constant current source S3 provides a current I12, which is the difference between the emitter current I11 through the transistor Q10 and the output current. An output terminal c is connected to the base of the transistor Q5 of the differential amplifier 1.
The variable constant current source 3 has the following construction. A transistor Q11, which is a PNP transistor, forms a current mirror circuit with a transistor Q12. The transistor Q12 is also a PNP transistor, sets a desired current of a constant current circuit, which has transistors Q13 to Q15, by adjusting the resistance of a variable resistor VR1 while confirming the current at a measurement terminal g. The transistors Q13 to Q15 are NPN transistors.
The collector currents through the transistors Q14 and Q15 are the currents I1 and I2 at the terminals e and f of the differential amplifier 1, respectively. Resistors R1 to R3 serve as loads. The above circuit elements except for the variable resistor VR1 are provided in an IC (integrated circuit).
The operation of the above circuit will now be described with reference again to FIG. 5. When the voltage level of the input signal IN at the terminal b exceeds the voltage level of the output signal OUT, the emitter current I3 through the transistor Q4 which has been carrying sufficient base current, becomes higher than the emitter current I5 through the transistor Q5. As a result, the current I4 which is the difference of the current I6 through the constant current source S1 from the emitter current I3 through the transistor Q4, is caused through the constant current source S2.
The emitter voltage on the transistor Q5 thus becomes equal to the emitter voltage on the transistor Q4 to reduce the difference between the base and emitter voltages, thus reducing the current I5. The reduction of the current I5 causes the current I3 to be further increased to reduce the collector voltage on the transistor Q4 and increase the collector voltage on the transistor Q5. Consequently, the difference between the collector voltage on the transistor Q4 and the output voltage OUT is amplified. Since the collector of the transistor Q4 is connected to the base of the transistor Q6, the collector current through the transistor Q6 at this time is reduced to reduce the current I8.
Also, since the collector of the transistor Q5 is connected to the base of the transistor Q7, the collector current therethrough is increased. The base voltage on the transistor Q8 is thus decreased to increase the collector current therethrough and further increase the emitter current I9 through the transistor Q7, thus causing further amplification of the difference between the voltage of the input signal IN and the output signal OUT. The sum of the currents I8 and I9 is the constant current I1.
When the collector current which is flowing at this time through the transistor Q9 constituting the current mirror circuit with the transistor Q8 is increased and exceeds the constant current I2, for instance, the collector current becomes the base current through the transistor Q10. When this base current exceeds a threshold current, the transistor Q10 is turned on, thus causing amplification of its base current to increase its emitter voltage. This voltage constitutes the voltage of the output signal OUT. In the above way, the differential amplifier 1 performs the voltage amplification.
Referring to FIG. 4, in the above filter circuit using the differential amplifier 1, a gm-C type LPF circuit is constituted by the differential amplifier 1 with mutual conductance gm and the capacitor C1. Denoting the voltage of the output signal OUT of the differential amplifier 1 by Vout, the voltage of the input signal IN by Vin, the resistance of the resistor R1 by r1, and the capacitance of the capacitor C1 by c1, the transfer function of the above circuit is: EQU Vout/Vin=(gm/c1)/(s+(gm/c1)) (1)
This equation expresses a primary LPF equation, and the cut-off frequency 0 of the filter circuit is: EQU .omega..sub.0 =gm/c1 (2)
Assuming I6=I7, the mutual conductance gm of the differential amplifier 1 can be expressed as: EQU gm=I1/2.multidot.r1.multidot.I6 (3)
where I1 is usually set as I1=2.multidot.I2. BY substituting equation (2) into equation (3), EQU .omega..sub.0 =I1/2.multidot.r1.multidot.I6.multidot.c1 (4)
The fluctuations of the cut-off frequency .omega..sub.0 due to fluctuations in manufacture also during operation, will now be described. Where the transistor Q14 is fabricated in an IC, for instance, the current I1 and the current through the transistor Q14 fluctuate with similar trends, so that the fluctuations of the cut-off frequency .omega..sub.0 are cancelled. As for the fluctuations due to other circuit element fluctuations, denoting the resistance of the resistor R1 by [r1] and the capacitance of the capacitor C1 by [c1], the cut-off frequency .omega..sub.0 is given as: EQU [.omega..sub.0 ]=1/[r1].multidot.[c1] (5)
Since the resistor R1 and the capacitor C1 are formed in an IC, [r1] and [c1] fluctuate without similar trends, i.e., without any bearing on each other.
This means that where all the filter circuit elements are formed in an IC, the cut-off frequency .omega..sub.0 fluctuates extremely. For instance, assuming that the resistance fluctuations are within .+-.20% and that the capacitance fluctuations are within .+-.25%, the cut-off frequency fluctuation range is -33% to +67%. Such a fluctuation range is not permissible in a filter circuit, which accuracy is required for. Usually, therefore, an adjustable resistor R42 is provided outside the IC, and the cut-off frequency is adjusted to ensure accuracy with each IC manufactured.
The filter circuit described above has the problem that the cut-off frequency fluctuates extremely as described in Japanese Laid-Open Patent Publication No. 56-164615. To make up for such fluctuations and make the filter circuit to be an accurate one, a large number of external circuit elements as well as their adjustment are necessary as described in Japanese Patent Application No. 05-039030.